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$ apt-get install gputils libusb-dev

$ git clone https://github.com/psmay/pk2cmd.git
$ cd pk2cmd/pk2cmd
$ make linux

$ cd ~/bin
$ ln -s .../pk2cmd/pk2cmd/pk2cmd
$ ln -s .../pk2cmd/pk2cmd/PK2DeviceFile.dat

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'688 at 8 MHz is 125 ns cycle.
F.osc = 8 MHz
T.osc = 0.125 µS

4 cycles per instruction: (T.osc * 4) == 500 ns == 0.5 µs
    ==> T.cy == 0.5 µs per instruction. (2M inst/second)

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* TIMER0 prescaler of 1:256 means:
  (256 * 0.5 µs instruction cycle) == 128 µs == 0.128 ms per TMR0 tick.
  Thus, rollover occurs every (256 * 0.128 ms) == 32.8 ms.

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I2C notes

T.hd.sta == 4 µS, which is a mere 8 instructions. We need to see
  the START transition within that timeframe. Just after that, we
  *may* sometimes be able to get a few more microseconds to
  determine we just missed it, and presumptively go with START.

I2C 100 kHz: 10 µs per cycle/bit. ==> 20 instructions
    ==> thinking: two byte read is about 200µs (aka 0.2ms)

--- not trying this speed. too fast. too much capacitance.
I2C 400 kHz: 2.5 µs per cycle/bit. ==> 5 instructions

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ADC notes

T.acq == 19.72 µS
    thus: 40 instruction cycles at 8 MHz

Running at 8 MHz, and F.osc/16, then:
    T.ad == 2.0 µS

11 T.ad cycles for the ADC process leads to 22.0 µS total,
which corresponds to 44 instruction cycles.

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